Graphic View of Pin Assignments
The Oleda PadViewer allows you to view your pin assignments as they would appear from the component side of the board. This image allows you to quickly evaluate your pin assignments and convey your intentions to your PCB layout team. The ability to highlight groups of signals can quickly pinpoint assignments that are not consistent with your intent.
Pins with signal assignments in your design are filled in green. Pins with out signal assignments are left white. The 'High Light' button lauches a control window which contains major architectual features of the FPGA on the left column, and design related groups and signals on the right column.
It this example, we have hightlighted three groups of signals from our design. The red group represent all signals whose IO standard is set to "PCI33_3". Each IO standard that is found in the design is represented. The blue pins, in this example, are signals whose names all began with "MEM_", whereas the green were signal names starting with "USB_". When your design data is read, the Oleda tools will look for common prefixes in the signal names and group signals accordingly. The asterix ,'*', after the signal group indicates this a grouping with multiple signals. The tool will also group and highlight bussed signals as one unit.
Additionally, you see there are voltage pins listed. These voltages represent the standard VCCINT and VCCAUX as dictated by the family of your part, but the VCCO and VREF values are also calculated based on the IO standards found in your design. Print-outs of the highlighted power pins provides a great way to initially plan your PCB power planes.
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